Analogy for Expressing the Low-level TI-83 Plus Memory Paging System
The Z80 CPU used in the TI-83 Plus/SE can only access 64K of memory. This is the range from 0000h-FFFFh. To allow the 83+ SE to have more memory, paging is used. This consists of dividing up the 2048K flash into 128 pages and the RAM into 2 pages. On the 83+ SE, which this document describes, the ROM pages are assigned values 00h-7Fh and the RAM pages are 80h-81h. However, RAM pages are sometimes refered to as RAM page 0 and 1, but this actually means 80h and 81h, respectively.
The best analogy for visualizing this system and how it works is as a series of tennis rackets. Each racket corresponds to one page on the 83+ SE. These tennis rackets can be swapped into 'slots', which on the 83+ are the address space 4000h-7FFFh, 8000h-BFFFh, and C000h-FFFFh. This document will focus on RAM pages primarily. Below is a picture of the two RAM rackets (pages) normally swapped in. Each racket has 64 strings across in one direction, and 256 in the other direction. The 16,384 intersections formed by these strings in each racket are the bytes of data that each racket can store.
Each slot is fixed, and represents the address space listed at the bottom. The slots are represented by the rectanglar boxes. The rackets are the pages, and can be moved from slot to slot and replaced. They are the data. When the OS wants to find a byte that is at a particular address, say 8100h, it will look in the appropriate slot. In our case, 8000-BFFF contains 8100h. Note that which racket is in that slot does not matter, since the same spot on that racket is accessed no matter which racket is in the slot. Say (8100h) is located at the intersection of the first two strings on a racket. Then to find 8100h, the OS will check the intersection of the first two strings on whatever racket is in that slot. If you were to switch rackets 0 and 1, then looking at 8100h would return the byte that was previously accessed in C100h. The actual data is unchanged, only where it is found.
On the SE there exist 6 other 'rackets' (pages), that are floating around in the Void of Unused Tennis Rackets. These are not used by the OS. However, if one wanted to, one could modfify a racket, suppose racket 5, so racket 5 would be identical in data to racket 1. Then using port 7, racket 5 could be swapped into 8000-BFFF. In this case, when the OS would go to find a byte in that range, it would find the same data that was there before (because we swapped in an identical racket).
On a related note, when a RAM reset occurs, it is the equivalent of restringing the RAM racket. All the strings are cut and new strings put on all the rackets. Hence, any previously existing data is lost. However, the ROM rackets are made of a nifty titanium alloy that is sensitive to electricity. The ROM rackets cannot accidentally 'snap strings' and lose data. To lose data, the ROM rackets must have a special electric charge put through them that will allow their data to be modified.
There is one racket, and one racket only that can never be modified. This racket is the first page of ROM, and it is made of hardened steel strings so it can never be overwritten. When you load a new OS on your 83+, it is like throwing out all the old ROM rackets (except that special first one), and the first unerasable racket provides instructions to 'make' a new set of ROM rackets. The new ROM rackets are sent from another calc or the computer and the first unerasable racket puts them in order and stores them.